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  ? 2002 microchip technology inc. ds21455b-page 1 tc7106/a/tc7107/a features ? internal reference with low temperature drift - tc7106/7: 80ppm/c typical - tc7106a/7a: 20ppm/c typical  drives lcd (tc7106) or led (tc7107) display directly  zero reading with zero input  low noise for stable display  auto-zero cycle eliminates need for zero adjustment  true polarity indication for precision null applications  convenient 9v battery operation (tc7106a)  high impedance cmos differential inputs: 10 12 ?  differential reference inputs simplify ratiometric measurements  low power operation: 10mw applications  thermometry  bridge readouts: strain gauges, load cells, null detectors  digital meters: voltage/current/ohms/power, ph  digital scales, process monitors  portable instrumentation device selection table general description the tc7106a and tc7107a 3-1/2 digit direct display drive analog-to-digital converters allow existing 7106/ 7107 based systems to be upgraded. each device has a precision reference with a 20ppm/c max tempera- ture coefficient. this represents a 4 to 7 times improve- ment over similar 3-1/2 digit converters. existing 7106 and 7107 based systems may be upgraded without changing external passive component values. the tc7107a drives common anode light emitting diode (led) displays directly with 8ma per segment. a low cost, high resolution indicating meter requires only a display, four resistors, and four capacitors.the tc7106a low power drain and 9v battery operation make it suitable for portable applications. the tc7106a/tc7107a reduces linearity error to less than 1 count. rollover error ? the difference in readings for equal magnitude, but opposite polarity input signals, is below 1 count. high impedance differential inputs offer 1pa leakage current and a 10 12 ? input imped- ance. the differential reference input allows ratiometric measurements for ohms or bridge transducer mea- surements. the 15 v p?p noise performance ensures a ?rock solid? reading. the auto-zero cycle ensures a zero display reading with a zero volts input. package code package pin layout temperature range cpi 40-pin pdip normal 0 cto+70 c ipl 40-pin pdip normal -25 cto+85 c ijl 40-pin cerdip normal -25 cto+85 c ckw 44-pin pqfp formed leads 0 cto+70 c clw 44-pin plcc ? 0 cto+70 c 3-1/2 digit analog-to-digital converters
tc7106/a/tc7107/a ds21455b-page 2 ? 2002 microchip technology inc. package type tc7106acpl tc7107aipl 44-pin plcc 44-pin pqfp 40-pin cerdip 40-pin pdip 1 2 3 4 osc1 5 6 7 8 9 10 11 12 test v ref + analog common c az v+ d 2 normal pin configuration 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 c 2 b 2 a 2 f 2 e 2 d 3 b 3 f 3 e 3 ab 4 (minus sign) (minus sign) 10's 100's 1000's (7106a/7107a) 100's osc2 osc3 v ref - c ref + c ref - v in + v in - v buff v int v- g 2 c 3 a 3 g 3 bp/gnd pol tc7106aijl TC7107AIJL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 100's 1000's 100's reverse configuration 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 d 1 c 1 b 1 a 1 f 1 g 1 e 1 1's v+ d 2 c 2 b 2 a 2 f 2 e 2 d 3 b 3 f 3 e 3 ab 4 pol d 1 c 1 b 1 a 1 f 1 g 1 e 1 1's 10's osc1 test v ref + analog common c az osc2 osc3 v ref - c ref + c ref - v in + v in - v buff v int v- g 2 c 3 a 3 g 3 bp/gnd (7106a/7107a) 27 26 25 24 23 7 8 9 10 11 nc g 2 nc nc test osc3 nc osc2 osc1 v+ d 1 c 1 b 1 12 13 14 15 16 17 18 19 20 21 22 38 37 36 35 34 ref hi a 1 f 1 tc7106ackw tc7107ackw 39 40 41 42 43 44 28 29 30 31 32 33 6 5 4 3 2 1 ref lo c ref c ref com in hi in lo a/z buff int v- g 1 e 1 d 2 c 2 b 2 a 2 f 2 e 2 d 3 c 3 a 3 g 3 bp/gn d pol ab 4 e 3 f 3 b 3 33 32 31 30 29 13 14 15 16 17 ref lo c ref f 1 g 1 e 1 d 2 c 2 nc b 2 a 2 f 2 e 2 d 3 18 19 20 21 22 23 24 25 26 27 28 44 43 42 41 40 a 1 b 3 f 3 tc7106aclw tc7107aclw 1 2 3 4 5 6 34 35 36 37 38 39 12 11 10 9 8 7 b 1 c 1 d 1 v+ nc osc1 osc2 osc3 test ref hi e 3 ab 4 pol nc bp/gnd g 3 a 3 c 3 g 2 c ref common in hi nc in lo a/z buff int v-
? 2002 microchip technology inc. ds21455b-page 3 tc7106/a/tc7107/a typical application v ref + tc7106/a tc7107/a 9v v ref 33 34 24k ? 1k ? 29 36 39 38 40 0.47 f 0.1 f v- osc1 osc3 osc2 to analog common (pin 32) 3 conversions/sec 200mv full scale c osc 100k ? 47k ? 0.22 f c ref - c ref + v in + v in - analog common v int v buff c az 20 21 segment drive 2 - 19 22 - 25 pol bp v+ minus sign backplane drive 28 r osc 100pf lcd display (tc7106/a) o r common node w/ led display (tc7107/a) 27 100mv 1 26 35 v ref - + 31 0.01 f analog input + ? 1m ? 30 32
tc7106/a/tc7107/a ds21455b-page 4 ? 2002 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings* tc7106a supply voltage (v+ to v-) .......................................15v analog input voltage (either input) (note 1) ... v+ to v- reference input voltage (either input) ............ v+ to v- clock input ................................................... test to v+ package power dissipation (t a 70c) (note 2) : 40-pin cerdip .......................................2.29w 40-pin pdip ............................................1.23w 44-pin plcc ...........................................1.23w 44-pin pqfp ...........................................1.00w operating temperature range: c (commercial) devices .............. 0c to +70c i (industrial) devices ................ -25c to +85c storage temperature range ..............-65c to +150c tc7107a supply voltage (v+) ...............................................+6v supply voltage (v-)..................................................-9v analog input voltage (either input) (note 1) ... v+ to v- reference input voltage (either input) ............ v+ to v- clock input ..................................................gnd to v+ package power dissipation (t a 70c) (note 2) : 40-pin cerdip ........................................2.29w 40-pin pdip ............................................1.23w 44-pin plcc ...........................................1.23w 44-pin pqfp ...........................................1.00w operating temperature range: c (commercial) devices .............. 0c to +70c i (industrial) devices ................ -25c to +85c storage temperature range ..............-65c to +150c *stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. tc7106/a and tc7107/a electrical specifications electrical characteristics: unless otherwise noted, specifications apply to both the tc7106/a and tc7107/a at t a =25c, f clock = 48khz. parts are tested in the circuit of the typical operating circuit. symbol parameter min typ max unit test conditions z ir zero input reading -000.0 000.0 +000.0 digital reading v in =0.0v full scale = 200.0mv ratiometric reading 999 999/1000 1000 digital reading v in =v ref v ref =100mv r/o rollover error (difference in reading for equal positive and negative reading near full scale) -1 0.2 +1 counts v in -=+v in + ? 200mv linearity (max. deviation from best straight line fit) -1 0.2 +1 counts full scale = 200mv or full scale = 2.000v note 1: input voltages may exceed the supply voltages, provided the input current is limited to 100 a. 2: dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 3: refer to ?differential input? discussion. 4: backplane drive is in phase with segment drive for ?off? segment, 180 out of phase for ?on? segment. frequency is 20 times conversion rate. average dc component is less than 50mv.
? 2002 microchip technology inc. ds21455b-page 5 tc7106/a/tc7107/a cmrr common mode rejection ratio (note 3) ?50? v/v v cm =1v,v in =0v, full scale = 200.0mv e n noise (peak to peak value not exceeded 95% of time) ?15? vv in =0v full scale - 200.0mv i l leakage current at input ? 1 10 pa v in =0v zero reading drift ? 0.2 1 v/c v in =0v ?c? device = 0c to +70c ?1.0 2 v/c v in =0v ?i? device = -25c to +85c tc sf scale factor temperature coefficient ? 1 5 ppm/c v in =199.0mv, ?c? device = 0c to +70c (ext. ref = 0ppmc) ??20ppm/cv in =199.0mv ?i? device = -25c to +85c i dd supply current (does not include led current for tc7107/a) ?0.81.8mav in =0.8 v c analog common voltage (with respect to positive supply) 2.7 3.05 3.35 v 25k ? betweencommonand positive supply v ctc temperature coefficient of analog common (with respect to positive supply) ????25k ? betweencommonand positive supply 7106/7/a 7106/7 20 80 50 ? ppm/c ppm/c 0c t a +70c (?c? commercial temperature range devices) v ctc temperature coefficient of analog common (with respect to positive supply) ? ? 75 ppm/c 0c t a +70c (?i? industrial temperature range devices) v sd tc7106a only peak to peak segment drive voltage 456vv+tov-=9v (note 4) v bd tc7106a only peak to peak backplane drive voltage 456vv+tov-=9v (note 4) tc7107a only segment sinking current (except pin 19) 58.0?mav+=5.0v segment voltage = 3v tc7107a only segment sinking current (pin 19) 10 16 ? ma v+ = 5.0v segment voltage = 3v tc7106/a and tc7107/a electrical specifications (continued) electrical characteristics: unless otherwise noted, specifications apply to both the tc7106/a and tc7107/a at t a =25c, f clock = 48khz. parts are tested in the circuit of the typical operating circuit. symbol parameter min typ max unit test conditions note 1: input voltages may exceed the supply voltages, provided the input current is limited to 100 a. 2: dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 3: refer to ?differential input? discussion. 4: backplane drive is in phase with segment drive for ?off? segment, 180 out of phase for ?on? segment. frequency is 20 times conversion rate. average dc component is less than 50mv.
tc7106/a/tc7107/a ds21455b-page 6 ? 2002 microchip technology inc. 2.0 pin descriptions the descriptions of the pins are listed in table 2-1. table 2-1: pin function table pin number (40-pin pdip) normal pin no. (40-pin pdip) (reversed symbol description 1 (40) v+ positive supply voltage. 2(39)d 1 activates the d section of the units display. 3(38)c 1 activates the c section of the units display. 4(37)b 1 activates the b section of the units display. 5(36)a 1 activates the a section of the units display. 6(35)f 1 activates the f section of the units display. 7(34)g 1 activates the g section of the units display. 8(33)e 1 activates the e section of the units display. 9(32)d 2 activates the d section of the tens display. 10 (31) c 2 activates the c section of the tens display. 11 ( 30) b 2 activates the b section of the tens display. 12 (29) a 2 activates the a section of the tens display. 13 (28) f 2 activates the f section of the tens display. 14 (27) e 2 activates the e section of the tens display. 15 (26) d 3 activates the d section of the hundreds display. 16 (25) b 3 activates the b section of the hundreds display. 17 (24) f 3 activates the f section of the hundreds display. 18 (23) e 3 activates the e section of the hundreds display. 19 (22) ab 4 activates both halves of the 1 in the thousands display. 20 (21) pol activates the negative polarity display. 21 (20) bp/gnd lcd backplane drive output (tc7106a). digital ground (tc7107a). 22 (19) g 3 activates the g section of the hundreds display. 23 (18) a 3 activates the a section of the hundreds display. 24 (17) c 3 activates the c section of the hundreds display. 25 (16) g 2 activates the g section of the tens display. 26 (15) v- negative power supply voltage. 27 (14) v int integrator output. connection point for integration capacitor. see integrating capacitor section for more details. 28 (13) v buff integration resistor connection. use a 47k ? resistor for a 200mv full scale range and a47k ? resistor for 2v full scale range. 29 (12) c az the size of the auto-zero capacitor influences system noise. use a 0.47 f capacitor for 200mv full scale, and a 0.047 f capacitor for 2v full scale. see section 7.1 on auto-zero capacitor for more details. 30 (11) v in - the analog low input is connected to this pin. 31 (10) v in + the analog high input signal is connected to this pin. 32 (9) analog common this pin is primarily used to set the analog common mode voltage for battery opera- tion or in systems where the input signal is referenced to the power supply. it also acts as a reference voltage source. see section 8.3 on analog common for more details. 33 (8) c ref - see pin 34. 34 (7) c ref +a0.1 f capacitor is used in most applications. if a large common mode voltage exists (for example, the v in - pin is not at analog common), and a 200mv scale is used, a 1 f capacitor is recommended and will hold the rollover error to 0.5 count. 35 (6) v ref - see pin 36.
? 2002 microchip technology inc. ds21455b-page 7 tc7106/a/tc7107/a 36 (5) v ref + the analog input required to generate a full scale output (1999 counts). place 100mv between pins 35 and 36 for 199.9mv full scale. place 1v between pins 35 and 36 for 2v full scale. see paragraph on reference voltage. 37 (4) test lamp test. when pulled high (to v+) all segments will be turned on and the display should read -1888. it may also be used as a negative supply for externally generated decimal points. see paragraph under test for additional information. 38 (3) osc3 see pin 40. 39 (2) osc2 see pin 40. 40 (1) osc1 pins 40, 39, 38 make up the oscillator section. for a 48khz clock (3 readings per section), connect pin 40 to the junction of a 100k ? resistor and a 100pf capacitor. the 100k ? resistor is tied to pin 39 and the 100pf capacitor is tied to pin 38. table 2-1: pin function table (continued) pin number (40-pin pdip) normal pin no. (40-pin pdip) (reversed symbol description
tc7106/a/tc7107/a ds21455b-page 8 ? 2002 microchip technology inc. 3.0 detailed description (all pin designations refer to 40-pin pdip.) 3.1 dual slope conversion principles the tc7106a and tc7107a are dual slope, integrating analog-to-digital converters. an understanding of the dual slope conversion technique will aid in following the detailed operation theory. the conventional dual slope converter measurement cycle has two distinct phases:  input signal integration  reference voltage integration (de-integration) the input signal being converted is integrated for a fixed time period (t si ). time is measured by counting clock pulses. an opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. the reference integration time is directly proportional to the input signal (t ri ). see figure 3-1. figure 3-1: basic dual slope converter in a simple dual slope converter, a complete conver- sion requires the integrator output to ?ramp-up? and ?ramp-down.? a simple mathematical equation relates the input signal, reference voltage and integration time . equation 3-1: for a constant v in : equation 3-2: the dual slope converter accuracy is unrelated to the integrating resistor and capacitor values as long as they are stable during a measurement cycle. an inher- ent benefit is noise immunity. noise spikes are inte- grated or averaged to zero during the integration periods. integrating adcs are immune to the large con- version errors that plague successive approximation converters in high noise environments. interfering sig- nals with frequency components at multiples of the averaging period will be attenuated. integrating adcs commonly operate with the signal integration period set to a multiple of the 50/60hz power line period (see figure 3-2). figure 3-2: normal mode rejection of dual slope converter + ? ref voltage analog input signal + ? display switch driver control logic integrator output clock counter polarity control phase control v in v ref v in 1/2 v ref variable reference integrate time fixed signal integrate time integrator c comparator +/? 1 rc v r t ri rc t si 0 v in (t)dt = where: v r = reference voltage t si = signal integration time (fixed) t ri = reference voltage integration time (variable). v in =v r t ri t si 30 20 10 0 normal mode rejection (db) 0.1/t 1/t 10/t input fre q uenc y t = measured period
? 2002 microchip technology inc. ds21455b-page 9 tc7106/a/tc7107/a 4.0 analog section in addition to the basic signal integrate and de- integrate cycles discussed, the circuit incorporates an auto-zero cycle. this cycle removes buffer amplifier, integrator, and comparator offset voltage error terms from the conversion. a true digital zero reading results without adjusting external potentiometers. a complete conversion consists of three cycles: an auto-zero, signal integrate and reference integrate cycle. 4.1 auto-zero cycle during the auto-zero cycle, the differential input signal is disconnected from the circuit by opening internal analog gates. the internal nodes are shorted to analog common (ground) to establish a zero input condition. additional analog gates close a feedback loop around the integrator and comparator. this loop permits com- parator offset voltage error compensation. the voltage level established on c az compensates for device offset voltages. the offset error referred to the input is less than 10 v. the auto-zero cycle length is 1000 to 3000 counts. 4.2 signal integrate cycle the auto-zero loop is entered and the internal differen- tial inputs connect to v in + and v in -. the differential input signal is integrated for a fixed time period. the tc7136/a signal integration period is 1000 clock peri- ods or counts. the externally set clock frequency is divided by four before clocking the internal counters. the integration time period is: equation 4-1: the differential input voltage must be within the device common mode range when the converter and mea- sured system share the same power supply common (ground). if the converter and measured system do not share the same power supply common, v in - should be tied to analog common. polarity is determined at the end of signal integrate phase. the sign bit is a true polarity indication, in that signals less than 1lsb are correctly determined. this allows precision null detection limited only by device noise and auto-zero residual offsets. 4.3 reference integrate phase the third phase is reference integrate or de-integrate. v in - is internally connected to analog common and v in + is connected across the previously charged refer- ence capacitor. circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. the time required for the output to return to zero is pro- portional to the input signal and is between 0 and 2000 counts. the digital reading displayed is: equation 4-2: 5.0 digital section (tc7106a) the tc7106a (figure 5-2) contains all the segment drivers necessary to directly drive a 3-1/2 digit liquid crystal display (lcd). an lcd backplane driver is included. the backplane frequency is the external clock frequency divided by 800. for three conversions/ second, the backplane frequency is 60hz with a 5v nominal amplitude. when a segment driver is in phase with the backplane signal, the segment is ?off.? an out of phase segment drive signal causes the segment to be ?on? or visible. this ac drive configuration results in negligible dc voltage across each lcd seg- ment. this insures long lcd display life. the polarity segment driver is ?on? for negative analog inputs. if v in +andv in - are reversed, this indicator will reverse. when the test pin on the tc7106a is pulled to v+, all segments are turned ?on.? the display reads -1888. during this mode, the lcd segments have a constant dc voltage impressed. do not leave the dis- play in this mode for more than several minutes! lcd displays may be destroyed if operated with dc levels for extended periods. the display font and the segment drive assignment are showninfigure5-1. figure 5-1: display font and segment assignment in the tc7106a, an internal digital ground is generated from a 6-volt zener diode and a large p channel source follower. this supply is made stiff to absorb the large capacitive currents when the backplane voltage is switched. t si = 4 f osc x 1000 where: f osc = external clock frequency. 1000 = v in v ref display font 1000's 100's 10's 1's
tc7106/a/tc7107/a ds21455b-page 10 ? 2002 microchip technology inc. figure 5-2: tc7106a block diagram tc7106a thousands hundreds tens units 4 39 osc2 v+ tes t 1 to switch drivers from comparator output clock 40 38 osc3 osc1 control logic 26 500 ? data latch c ref - r int v+ c az v int 28 29 27 33 36 34 10 a 31 a/z int az & de () 32 int 26 integrator to digital section de (+) de ( ? ) de (+) de ( ? ) analog common c ref + v in + v in - v buff c int v ref +v ref - a/z c ref + 35 + ? lcd segment drivers 200 backplane f osc v- v th = 1v v- + ? internal digital ground low tempco v ref comparator ? a/z v+ ? 3.0v 1 r osc c osc 7 segment decode 7 segment decode 7 segment decode 21 typical segment output segment output v+ 0.5ma 2ma 6.2v lcd display + ? 37 a/z 30 internal digital ground
? 2002 microchip technology inc. ds21455b-page 11 tc7106/a/tc7107/a 6.0 digital section (tc7107a) figure 6-2 shows a tc7107a block diagram. it is designed to drive common anode leds. it is identical to the tc7106a, except that the regulated supply and backplane drive have been eliminated and the segment drive is typically 8ma. the 1000's output (pin 19) sinks current from two led segments, and has a 16ma drive capability. in both devices, the polarity indication is ?on? for neg- ative analog inputs. if v in - and v in + are reversed, this indication can be reversed also, if desired. the display font is the same as the tc7106a. 6.1 system timing the oscillator frequency is divided by 4 prior to clocking the internal decade counters. the four-phase mea- surement cycle takes a total of 4000 counts, or 16,000 clock pulses. the 4000-count cycle is independent of input signal magnitude. each phase of the measurement cycle has the follow- ing length: 1. auto-zero phase: 1000 to 3000 counts (4000 to 12000 clock pulses). for signals less than full scale, the auto-zero phase is assigned the unused reference integrate time period: 2. signal integrate: 1000 counts (4000 clock pulses). this time period is fixed. the integration period is: equation 6-1: 3. reference integrate: 0 to 2000 counts (0 to 8000 clock pulses). the tc7106a/7107a are drop-in replacements for the 7106/7107 parts. external component value changes are not required to benefit from the low drift internal reference. 6.2 clock circuit three clocking methods may be used (see figure 6-1): 1. an external oscillator connected to pin 40. 2. a crystal between pins 39 and 40. 3. an rc oscillator using all three pins. figure 6-1: clock circuits t si = 4000 1 f osc ? ? ? ? where: f osc is the externally set clock frequency. tc7106a tc7107a 4 crystal rc network 40 38 ext osc 39 to test pin on tsc7106a to gnd pin on tsc7107a to counter
tc7106/a/tc7107/a ds21455b-page 12 ? 2002 microchip technology inc. figure 6-2: tc7107a block diagram tc7107a thousands hundreds tens units 4 39 osc2 v+ 1 to switch drivers from comparator output clock 7 segment decode 40 38 osc3 osc1 logic control data latch c ref - r int v+ c az v int 28 29 27 33 36 34 10 a 31 a/z int az & de () 32 int 26 integrator to digital section de (+) de ( ? ) de (+) de ( ? ) analog common c ref + v in + v in - v buff c int v ref +v ref - a/z c ref + 35 + ? lcd segment drivers f osc v- + ? digital ground low tempco v ref comparator ? a/z v+ ? 3.0v 1 r osc c osc 7 segment decode 7 segment decode typical segment output internal digital ground segment output v+ 0.5ma 8ma led display + ? a/z 30 digital ground test 21 37 500 ?
? 2002 microchip technology inc. ds21455b-page 13 tc7106/a/tc7107/a 7.0 component value selection 7.1 auto-zero capacitor (c az ) the c az capacitor size has some influence on system noise. a 0.47 f capacitor is recommended for 200mv full scale applications where 1lsb is 100 v. a 0.047 f capacitor is adequate for 2.0v full scale applications. a mylar type dielectric capacitor is adequate. 7.2 reference voltage capacitor (c ref ) the reference voltage used to ramp the integrator out- put voltage back to zero during the reference integrate cycleisstoredonc ref .a0.1 f capacitor is acceptable when v in - is tied to analog common. if a large common mode voltage exists (v ref - ? analog common) and the application requires 200mv full scale, increase c ref to 1.0 f. rollover error will be held to less than 1/2 count. a mylar dielectric capacitor is adequate. 7.3 integrating capacitor (c int ) c int should be selected to maximize the integrator out- put voltage swing without causing output saturation. due to the tc7106a/7107a superior temperature coef- ficient specification, analog common will normally sup- ply the differential voltage reference. for this case, a 2v full scale integrator output swing is satisfactory. for 3 readings/second (f osc =48khz),a0.22 f value is suggested. if a different oscillator frequency is used, c int must be changed in inverse proportion to maintain the nominal 2v integrator swing. an exact expression for c int is: equation 7-1: c int must have low dielectric absorption to minimize rollover error. a polypropylene capacitor is recom- mended. 7.4 integrating resistor (r int ) the input buffer amplifier and integrator are designed with class a output stages. the output stage idling cur- rent is 100 a. the integrator and buffer can supply 20 a drive currents with negligible linearity errors. r int is chosen to remain in the output stage linear drive region, but not so large that printed circuit board leak- age currents induce errors. for a 200mv full scale, r int is 47k ? . 2.0v full scale requires 470k ? . note: f osc = 48khz (3 readings per sec). 7.5 oscillator components r osc (pin 40 to pin 39) should be 100k ? .c osc is selected using the equation: equation 7-2: for f osc of 48khz, c osc is 100pf nominally. note that f osc is divided by four to generate the tc7106a internal control clock. the backplane drive signal is derived by dividing f osc by 800. to achieve maximum rejection of 60hz noise pickup, the signal integrate period should be a multiple of 60hz. oscillator frequencies of 240khz, 120khz, 80khz, 60khz, 48khz, 40khz, etc. should be selected. for 50hz rejection, oscillator frequencies of 200khz, 100khz, 66-2/3khz, 50khz, 40khz, etc. would be suit- able. note that 40khz (2.5 readings/second) will reject both 50hz and 60hz. 7.6 reference voltage selection a full scale reading (2000 counts) requires the input signal be twice the reference voltage. *v fs =2v ref. in some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. assume, for example, a pres- sure transducer output is 400mv for 2000 lb/in 2 . rather than dividing the input voltage by two, the refer- ence voltage should be set to 200mv. this permits the transducer input to be used directly. c int = (4000) v int 1 f osc v fs r int ? ? ? ? ? ? ? ? where: f osc = clock frequency at pin 38 v fs = full scale input voltage r int = integrating resistor v int = desired full scale integrator output swing component value nominal full scale voltage 200.0mv 2.000v c az 0.47 f 0.047 f r int 47k ? 470k ? c int 0.22 f0.22 f required full scale voltage* v ref 200.0mv 100.0mv 2.000v 1.000v f osc = 0.45 rc
tc7106/a/tc7107/a ds21455b-page 14 ? 2002 microchip technology inc. thedifferentialreferencecanalsobeusedwhenadig- ital zero reading is required when v in is not equal to zero. this is common in temperature measuring instru- mentation. a compensating offset voltage can be applied between analog common and v in -. the trans- ducer output is connected between v in + and analog common. the internal voltage reference potential available at analog common will normally be used to supply the converter's reference. this potential is stable when- ever the supply potential is greater than approximately 7v. in applications where an externally generated ref- erence voltage is desired, refer to figure 7-1. figure 7-1: external reference 8.0 device pin functional description 8.1 differential signal inputs v in +(pin31),v in -(pin30) the tc7106a/7017a is designed with true differential inputs and accepts input signals within the input stage common mode voltage range (v cm ). the typical range is v+ ? 1.0 to v+ + 1v. common mode voltages are removed from the system when the tc7106a/ tc7107a operates from a battery or floating power source (isolated from measured system) and v in -is connected to analog common (v com ) (see figure 8-2). in systems where common mode voltages exist, the 86db common mode rejection ratio minimizes error. common mode voltages do, however, affect the inte- grator output level. integrator output saturation must be prevented. a worst case condition exists if a large pos- itive v cm exists in conjunction with a full scale negative differential signal. the negative signal drives the inte- grator output positive along with v cm (see figure 8-1). for such applications the integrator output swing can be reduced below the recommended 2.0v full scale swing. the integrator output will swing within 0.3v of v+ or v- without increasing linearity errors. figure 8-1: common mode voltage reduces available integrator swing (v com v in ) 8.2 differential reference v ref +(pin36),v ref -(pin35) the reference voltage can be generated anywhere within the v+ to v- power supply range. to prevent rollover type errors being induced by large common mode voltages, c ref should be large com- pared to stray node capacitance. the tc7106a/tc7107a circuits have a significantly lower analog common temperature coefficient. this gives a very stable voltage suitable for use as a refer- ence. the temperature coefficient of analog common is 20ppm/c typically. 8.3 analogcommon(pin32) the analog common pin is set at a voltage potential approximately 3.0v below v+. the potential is between 2.7v and 3.35v below v+. analog common is tied inter- nally to the n channel fet capable of sinking 20ma. this fet will hold the common line at 3.0v should an external load attempt to pull the common line toward v+. analog common source current is limited to 10 a. analog common is, therefore, easily pulled to a more negative voltage (i.e., below v+ ? 3.0v). the tc7106a connects the internal v in +andv in - inputs to analog common during the auto-zero cycle. during the reference integrate phase, v in - is con- nected to analog common. if v in - is not externally con- nected to analog common, a common mode voltage exists. this is rejected by the converter's 86db com- mon mode rejection ratio. in battery operation, analog common and v in - are usually connected, removing common mode voltage concerns. in systems where v- is connected to the power supply ground, or to a given voltage, analog common should be connected to v in -. tc7106a tc7107a 6.8v zener i z v+ v+ v+ 1.2v ref common tc7106a tc7107a 6.8k ? 20k ? v ref + v ref - v ref + v ref - ( a )( b ) v+ r i + ? v in v cm c i integrator v i = [ [ v cm ? v in input buffer c i = integration capacitor r i = integration resistor 4000 f osc t i = integration time = where: v i ? + ? + t i r i c i
? 2002 microchip technology inc. ds21455b-page 15 tc7106/a/tc7107/a figure 8-2: common mode voltage removed in battery operation with v in - = analog common the analog common pin serves to set the analog section reference or common point. the tc7106a is specifically designed to operate from a battery, or in any measure- ment system where input signals are not referenced (float), with respect to the tc7106a power source. the analog common potential of v+ ? 3.0v gives a 6v end of battery life voltage. the common potential has a 0.001% voltage coefficient and a 15 ? output impedance. with sufficiently high total supply voltage (v+ ? v- > 7.0v), analog common is a very stable potential with excellent temperature stability, typically 20ppm/c. this potential can be used to generate the reference voltage. an external voltage reference will be unneces- sary in most cases because of the 50ppm/c maximum temperature coefficient. see internal voltage refer- ence discussion. 8.4 test (pin 37) the test pin potential is 5v less than v+. test may be used as the negative power supply connection for external cmos logic. the test pin is tied to the inter- nally generated negative logic supply (internal logic ground) through a 500 ? resistor in the tc7106a. the test pin load should be no more than 1ma. if test is pulled to v+ all segments plus the minus sign will be activated. do not operate in this mode for more than several minutes with the tc7106a. with test = v+, the lcd segments are impressed with a dc voltage which will destroy the lcd. the test pin will sink about 10ma when pulled to v+. 8.5 internal voltage reference the analog common voltage temperature stability has been significantly improved (figure 8-3). the ?a? ver- sion of the industry standard circuits allow users to upgrade old systems and design new systems without external voltage references. external r and c values do not need to be changed. figure 8-4 shows analog common supplying the necessary voltage reference for the tc7106a/tc7107a. figure 8-3: analog common temperature coefficient figure 8-4: internal voltage reference connection v buf c az v int bp pol segment drive osc1 osc3 osc2 v- v+ v ref + v ref - analog common v- v+ v- v+ gnd gnd measured system power source 9v lcd display tc7106a + v in - v in + typical no maximum specified no maximum specified no maximum specified typical typical 200 180 160 140 120 100 80 60 40 20 0 temperature coefficient (ppm/ c) icl7136 tc 7106a icl7106 maximum limit v- analog common tc7106a tc7107a v ref + 32 35 36 24k ? 1k ? v ref - v ref 1 set v ref = 1/2 v full scale v+
tc7106/a/tc7107/a ds21455b-page 16 ? 2002 microchip technology inc. 9.0 power supplies the tc7107a is designed to work from 5v supplies. however, if a negative supply is not available, it can be generated from the clock output with two diodes, two capacitors, and an inexpensive ic (figure 9-1). figure 9-1: generating negative supply from +5v in selected applications a negative supply is not required. the conditions to use a single +5v supply are:  the input signal can be referenced to the center of the common mode range of the converter.  the signal is less than 1.5v.  an external reference is used. the tsc7660 dc to dc converter may be used to gen- erate -5v from +5v (figure 9-2). figure 9-2: negative power supply generation with tc7660 9.1 tc7107 power dissipation reduction the tc7107a sinks the led display current and this causes heat to build up in the ic package. if the inter- nal voltage reference is used, the changing chip tem- perature can cause the display to change reading. by reducing the led common anode voltage, the tc7107a package power dissipation is reduced. figure 9-3 is a curve tracer display showing the rela- tionship between output current and output voltage for a typical tc7107cpl. since a typical led has 1.8 volts across it at 7ma, and its common anode is connected to +5v, the tc7107a output is at 3.2v (point a on figure 9-3). maximum power dissipation is 8.1ma x 3.2v x 24 segments = 622mw. figure 9-3: tc7107 output current vs. output voltage notice, however, that once the tc7107a output voltage is above two volts, the led current is essentially con- stant as output voltage increases. reducing the output voltage by 0.7v (point b in figure 9-3) results in 7.7ma of led current, only a 5 percent reduction. maximum power dissipation is only 7.7ma x 2.5v x 24 = 462mw, a reduction of 26%. an output voltage reduction of 1 volt (point c) reduces led current by 10% (7.3ma) but power dissipation by 38% (7.3ma x 2.2v x 24 = 385mw). reduced power dissipation is very easy to obtain. figure 9-4 shows two ways: either a 5.1 ohm, 1/4 watt resistor or a 1 amp diode placed in series with the dis- play (but not in series with the tc7107a). the resistor will reduce the tc7107a output voltage, when all 24 segments are ?on,? to point ?c? of figure 9-4. when segments turn off, the output voltage will increase. the diode, on the other hand, will result in a relatively steady output voltage, around point ?b.? in addition to limiting maximum power dissipation, the resistor reduces the change in power dissipation as the display changes. this effect is caused by the fact that, as fewer segments are ?on,? each ?on? output drops more voltage and current. for the best case of six seg- tc7107a v+ osc1 osc2 osc3 gnd v- v+ cd4009 0.047 f 1n914 1n914 10 f ? + v- = -3.3v gnd v in - v in v ref + v ref - com +5v led drive 36 1 35 32 31 30 26 v+ v- 21 tc7660 3 10 f + 10 f + 2 8 5 (-5v) tc7107a 4 v in + c b a 6.000 7.000 8.000 9.000 10.000 2.00 2.50 3.00 3.50 4.00 output voltage (v) output current (ma)
? 2002 microchip technology inc. ds21455b-page 17 tc7106/a/tc7107/a ments (a ?111? display) to worst case (a ?1888? display), the resistor will change about 230mw, while a circuit without the resistor will change about 470mw. there- fore, the resistor will reduce the effect of display dissi- pation on reference voltage drift by about 50%. the change in led brightness caused by the resistor is almost unnoticeable as more segments turn off. if dis- play brightness remaining steady is very important to the designer, a diode may be used instead of the resistor. figure 9-4: diode or resistor limits package power dissipation 10.0 typical applications 10.1 liquid crystal display sources several manufacturers supply standard lcds to inter- face with the tc7106a 3-1/2 digit analog-to-digital converter. note: contact lcd manufacturer for full product listing and specifications. 10.2 light emitting diode display sources several led manufacturers supply seven segment digits with and without decimal point annunciators for the tc7107a. 10.3 decimal point and annunciator drive the test pin is connected to the internally generated digital logic supply ground through a 500 ? resistor. the test pin may be used as the negative supply for exter- nal cmos gate segment drivers. lcd display annunci- ators for decimal points, low battery indication, or function indication may be added without adding an additional supply. no more than 1ma should be sup- plied by the test pin; its potential is approximately 5v below v+ (see figure 10-1 ). figure 10-1: decimal point drive using test as logic ground manufacturer address/phone representative part numbers* crystaloid electronics 5282 hudson dr. hudson, oh 44236 216-655-2429 c5335, h5535, t5135, sx440 and 720 palomar ave. sunnyvale, ca 94086 408-523-8200 fe 0201, 0701 fe 0203, 0701 fe 0501 epson 3415 kashikawa st. torrance, ca 90505 213-534-0360 ld-b709bz ld-h7992az hamlin, inc. 612 e. lake st. lake mills, wi 53551 414-648-2361 00 3902, 3933, 3903 tp2 tp5 100 k ? tp1 24k ? 1k ? 0.1 f tp3 0.01 f + in ? 0.22 f display display 100 pf +5v 1m ? -5v 150 ? 0.47 f tc7107a 40 tp 4 30 21 20 10 1 47 k ? 1n4001 5.1 ? 1/4w manufacturer address/phone display hewlett-packard components 640 page mill rd. palo alto, ca 94304 led and 720 palomar ave. sunnyvale, ca 94086 408-523-8200 led tc7106a bp test 37 21 v+ v+ gnd to lcd decimal point to lcd decimal point to lcd backplane 4049 tc7106a decimal point select v+ v+ test gnd 4030 bp
tc7106/a/tc7107/a ds21455b-page 18 ? 2002 microchip technology inc. 10.4 ratiometric resistance measurements the true differential input and differential reference make ratiometric reading possible. typically in a ratio- metric operation, an unknown resistance is measured, with respect to a known standard resistance. no accu- rately defined reference voltage is needed. the unknown resistance is put in series with a known standard and a current passed through the pair. the voltage developed across the unknown is applied to the input and the voltage across the known resistor is applied to the reference input. if the unknown equals the standard, the display will read 1000. the displayed reading can be determined from the following expression: the display will over range for: r unknown 2xr standard figure 10-2: low parts count ratiometric resistance measurement figure 10-3: temperature sensor figure 10-4: positive temperature coefficient resistor temperature sensor figure 10-5: tc7106a, using the internal reference: 200mv full scale, 3 readings-per-second (rps) displayed reading () runknown rs dard tan ------------------------------- x 1000 = v ref + v ref - v in + v in - analog common tc7106a lcd displa y r standard r unknown v+ v+ v- v in - v in + v ref + v ref - common 50k ? r 2 160k ? 300k ? 300k ? r 1 50k ? 1n4148 sensor 9v + tc7106a v fs = 2v tc7106a v+ v- v in - v in + v ref + v ref - common 5.6k ? 160k ? r 2 20k ? 1n914 9v r 1 20k ? + r 3 0.7%/ c ptc 100k ? 100pf 0.47 f 47k ? 0.22 f to display to backplane 0.1 f 21 1k ? 22k ? 9v set v ref = 100mv tc7106a 0.01 f + in 1m ? ? to pin 1 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 + ?
? 2002 microchip technology inc. ds21455b-page 19 tc7106/a/tc7107/a figure 10-6: tc7107 internal reference: 200mv full scale, 3rps, v in -tiedtogndfor single ended inputs figure 10-7: circuit for developing under range and over range signals from tc7106a outputs figure 10-8: tc7106/tc7107: recommended component values for 2.00v full scale figure 10-9: tc7107 operated from single +5v supply 100k ? 100pf 0.47 f 47k ? 0.22 f to display 0.1 f 21 1k ? 22k ? set v ref = 100mv 0.01 f + in 1m ? ? to pin 1 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 -5v +5v tc7107a 21 20 40 to logic v cc v- to logic v cc v+ cd4077 u/r o/r cd4023 or 74c10 tc7106a 1 o/r = over range u/r = under ran g e 100k ? 100pf 0.047 f 470k ? 0.22 f to display 0.1 f 25k ? 24k ? v + set v ref = 1v 0.01 f + in 1m ? ? v- 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 to pin 1 tc7106a tc7107a 100pf 0.47 f 47k ? to display 0.1 f 1k ? v+ set v ref = 100mv 10k ? 10k ? 1.2v 0.01 f ? in 1m ? 100k ? 0.22 f 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 tc7107a to pin 1 note : an external reference must be used in this application.
tc7106/a/tc7107/a ds21455b-page 20 ? 2002 microchip technology inc. figure 10-10: 3-1/2 digit true rms ac dmm figure 10-11: integrated circuit temperature sensor seg drive 47k ? 1w 10% + 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ad636 ? 6.8 f 0.02 f 20k ? 10% 10k ? 1m ? 1m ? in4148 1 f ? + 9m ? 900k ? 90k ? 10k ? 200mv 2v 20v 200v com v in tc7106a lcd displa y 24k ? 1k ? 2.2 f 0.01 f 1m ? 10% 9v + 1 36 35 32 31 30 26 v+ analog common v in + v in - 26 27 29 28 40 38 39 bp v- c1 = 3 - 10pf variable c2 = 132pf variable v ref + v ref - v- tc7106a v ref - common v in + v+ + ? 9v v+ 2 1 4 26 6 5 3 2 3 1 4 8 temperature dependent output nc 1.3k 50k ? constant 5v 50k ? 51k ? 5.1k ? r 4 r 5 r 1 r 2 v out = 1.86v @ 25 c v in - v fs = 2.00v gnd v- v out adj temp ref02 tc911 v ref +
? 2002 microchip technology inc. ds21455b-page 21 tc7106/a/tc7107/a 11.0 packaging information 11.1 package marking information package marking data not available at this time. 11.2 taping form pin 1 component taping orientation for 44-pin plcc devices user direction of feed standard reel component orientation for tr suffix device note: drawing does not represent total number of pins. w p package carrier width (w) pitch (p) part per full reel reel size 44-pin plcc 32 mm 24 mm 500 13 in carrier tape, number of components per reel and reel size component taping orientation for 44-pin pqfp devices user direction of feed pin 1 standard reel component orientation for tr suffix device w p package carrier width (w) pitch (p) part per full reel reel size 44-pin pqfp 24 mm 16 mm 500 13 in carrier tape, number of components per reel and reel size note: drawing does not represent total number of pins.
tc7106/a/tc7107/a ds21455b-page 22 ? 2002 microchip technology inc. 11.3 package dimensions dimensions: inches (mm) 2.065 (52.45) 2.027 (51.49) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) .110 (2.79) .090 (2.29) .555 (14.10) .530 (13.46) .610 (15.49) .590 (14.99) .015 (0.38) .008 (0.20) .700 (17.78) .610 (15.50) .040 (1.02) .020 (0.51) 40-pin pdip (wide) pin 1 3 min. dimensions: inches (mm) .015 (0.38) .008 (0.20) .620 (15.75) .590 (15.00) .700 (17.78) .620 (15.75) .540 (13.72) .510 (12.95) 2.070 (52.58) 2.030 (51.56) .210 (5.33) .170 (4.32) .020 (0.51) .016 (0.41) .110 (2.79) .090 (2.29) .065 (1.65) .045 (1.14) .200 (5.08) .125 (3.18) .098 (2.49) max. .030 (0.76) min. .060 (1.52) .020 (0.51) .150 (3.81) min. 40-pin cerdip (wide) pin 1 3 min.
? 2002 microchip technology inc. ds21455b-page 23 tc7106/a/tc7107/a 11.3 package dimensions (continued) dimensions: inches (mm) .695 (17.65) .685 (17.40) .656 (16.66) .650 (16.51) .656 (16.66) .650 (16.51) .021 (0.53) .013 (0.33) .032 (0.81) .026 (0.66) .630 (16.00) .591 (15.00) .120 (3.05) .090 (2.29) .180 (4.57) .165 (4.19) .695 (17.65) .685 (17.40) .050 (1.27) typ. .020 (0.51) min. pin 1 44-pin plcc dimensions: inches (mm) .557 (14.15) .537 (13.65) .398 (10.10) .390 (9.90) .031 (0.80) typ. .018 (0.45) .012 (0.30) .398 (10.10) .390 (9.90) .010 (0.25) typ. .096 ( 2.45 ) max. .557 (14.15) .537 (13.65) .083 (2.10) .075 (1.90) .041 (1.03) .026 (0.65) 7 max. .009 (0.23) .005 (0.13) 44-pin pqfp pin 1
tc7106/a/tc7107/a ds21455b-page 24 ? 2002 microchip technology inc. product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. part code tc711x x x xxx 6 = lcd 7 = led a or blank* r (reversed pins) or blank (cpl pkg only) * "a" parts have an improved reference tc package code (see below) : }
? 2002 microchip technology inc. ds21455b-page 25 tc7106/a/tc7107/a information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip?s products as critical com- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, filterlab, k ee l oq ,microid, mplab,pic,picmicro,picmaster, picstart, pro mate, seeval and the embedded control solutions company are registered trademarks of microchip tech- nology incorporated in the u.s.a. and other countries. dspic, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, mxdev, picc, picdem, picdem.net, rfpic, select mode and total endurance are trademarks of microchip technology incorporated in the u.s.a. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2002, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified.
ds21455b-page 26 ? 2002 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com rocky mountain 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-7456 atlanta 500 sugar mill road, suite 200b atlanta, ga 30350 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, indiana 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 new york 150 motor parkway, suite 202 hauppauge, ny 11788 tel: 631-273-5305 fax: 631-273-5335 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technology consulting (shanghai) co., ltd., chengdu liaison office rm. 2401, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-6766200 fax: 86-28-6766599 china - fuzhou microchip technology consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - shanghai microchip technology consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technology consulting (shanghai) co., ltd., shenzhen liaison office rm. 1315, 13/f, shenzhen kerry centre, renminnan lu shenzhen 518001, china tel: 86-755-2350361 fax: 86-755-2366086 hong kong microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 india microchip technology inc. india liaison office divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 ta iw a n microchip technology taiwan 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france microchip technology sarl parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh gustav-heinemann ring 125 d-81739 munich, germany tel: 49-89-627-144 0 fax: 49-89-627-144-44 italy microchip technology srl centro direzionale colleoni palazzo taurus 1 v. le colleoni 1 20041 agrate brianza milan, italy tel: 39-039-65791-1 fax: 39-039-6899883 united kingdom arizona microchip technology ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 03/01/02 *ds21455b* w orldwide s ales and s ervice


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